OS X ver. 10.2.3 Hangs under MOL

Benjamin Herrenschmidt mol-general@lists.maconlinux.org
30 Dec 2002 19:23:37 +0100


On Mon, 2002-12-30 at 16:31, Samuel Rydh wrote:

> Well, SPR #1014 is the MSSCR0 register (Memory Subsystem Control Register0).
> I don't remember exactly the purpose of this register (and I don't have
> my Motorola manuals at hand), but it is hardware related and
> MOL should just make sure the register behaves properly.
> 
> Until this problem is fixed (if it is indeed the implementation of the
> MSSCR0 register that is at fault), a possible workaround is putting
> mol in G3 mode. I believe only 74xx processors has the MSSCR0 register...

It may just be a matter of providing a higher CPU version in the PVR.
AFAIK, MSSCR0 is used by MacOS X (and Linux with recent kernels) to disable
L2 hardware prefetch during NAP mode to work around a CPU bug on some revs.
Though I fail to see how just reading/writing to the "emulated" register
will harm MOL worse than just spilling a lot of debugging output.

Ben.